Assume that a disk has 128 tracks, with each track having 64 sectors and each sector is of size 1 M Bytes. The cluster size in this system can be assumed to be 2 sectors. A file having the name assignmentmcs012.txt is of size 16 MB. Assume that it is a new disk, and the first 16 clusters are occupied by the Operating System. Rest all the clusters are free. How can this file be allotted space on this disk? Also, show the content of FAT after the space allocation to this file. You may make suitable assumptions.

What is a DMA? What are the advantages of using DMA? Explain the functions of a DMA interface with the help of a block diagram.

What are the different kinds of interrupts? Explain the process of handling an interrupt with the help of a diagram.

A computer has 4 K Word RAM with each memory word of 8 bits. It has cache memory, having 16 blocks, having a size of 16 bits (2 memory words). Show how the main memory address (3AC), will be  mapped to the cache address, if

(i) Direct cache mapping is used

(ii) Associative cache mapping is used

(iii) Two-way set associative cache mapping is used.

You should show the size of the tag, index, main memory block address and offset in your answer.

Refer to the Figure 2(b) on page 8 in Unit 1 of Block 2. Draw the Internal organisation of a 16×2 RAM. Explain all the Input and Output of this organisation. Also, answer the following:

(i) How many data input and data output lines does this RAM need? Explain your answer.

(ii)How many address lines are needed for this RAM? Give reasons in support of your answer.

Explain the functioning of the master-slave flip-flop with the help of a diagram.

(i) Represent (129.5) and (-1.125) in IEEE 754 single-precision and double-precision formats.

Explain the functioning of the RS flip flop with the help of a logic diagram and characteristic table. Also, explain the excitation table of this flip-flop.

Assume that a source data value 1111 was received at a destination as 1011. Show how Hamming's Error-Correcting code bits will be appended to source data to identify and correct the error of one bit at the destination. You may assume that transmission error occurs only in the source data and not the source parity bits.

Explain the functioning of a 2 x 4 decoder with the help of a logic diagram and an example input.

Consider the Adder-Subtractor circuit as shown in Figure 3.15 page 76 of Block 1. What would be the values of various inputs and outputs; viz. C input to each full adder, A, B, A, B, A, B2, A3, B3, So, 31, 32, 33, Carty out bit, anal overflow coalition, if this circuit palus subtraction (A-B), when die value of A is 1010 and B is 1011.

Simplify the following function using K-map: F(A, B, C, D) - 2 (0, 1, 2, 4, 8, 9, 10, 13) Draw the circuit for the resultant function using NAND gates.

Perform the following conversion of numbers:

i) Decimal (345789531)10 to binary and hexadecimal.

ii) Hexadecimal (ABC023DEF) into Octal.

iii) String "MCS-12 Price in $" into UTF 8.

Draw three more diagrams, each showing the state of the machine after execution of every instruction viz. LOAD, ADD and STOR. Show the changes in the values of Registers and memory locations, if any, due to the execution of the instruction. Show all the addresses and values in hexadecimal notations.

Draw a diagram showing the Initial State of the machine with the addresses and content of memory locations in hexadecimal. Show only those address locations of the memory that store the instruction and data. Also, show the content of all the stated registers.

Please refer to Figure 4 of Unit 1 of Block 1 on page 11 of the Instruction execution example. Assuming a similar machine is to be used for the execution of the following three consecutive instructions:

LOAD A; Load the content of Memory location A into the Accumulator Register.

ADD B; Add the content of memory location B to Accumulator Register.

STOR C; Stores the content of the Accumulator register to memory location C.

However, this machine is different from the example in Figure 4 in the following ways:

Each memory word of this new machine is of 32 bits length. 

Each instruction is of length 32 bits with 12 bits for operation code (opcode) and 20 bits for specifying one direct operand. The size of operand is 32 bits.

The Main Memory of the machine is of size 220 words.

The three consecutive instructions are placed starting from memory location (11FFE); operand A is at location (2FFFF) and contains a value (111AB4C1)h, Operand B is at location (30000) and contains a value (AAA1A1FE) and operand C is at location (30001) and contains a value

The AC, IR, MAR and MBR registers are of size 32 bits, whereas PC register is of size 20 bits. The initial content of the PC register is (11FFE)

Explain the following in the context of Internet and its applications, giving their features and uses:

(i) Online Education

(ii) eCommerce

Describe the process of creating a web email account. What are the different components of a mail message? Explain with the help of a diagram.

What are the different features of a browser? If you want to perform Online Banking Transactions, what precautions will you take before performing a transaction?

What is Internet? What are the major protocols used on Internet? What is an IP address? How can an IP address be related to a web address? Explain with the help of an example.

Four branch offices of an organisation are located in four major cities of a vast country. Explain the characteristics of the network that will be needed for every branch office. All the four branch offices network should also be connected by another network. Explain the characteristics of this network also.